ADC Background
Work on EViP technology was initiated by ADC’s founder, Dr. Tuan A Duong, while he was working at NASA’s Jet Propulsion Laboratory, in one of three frontier neural network teams in the United States (including AT&T Bell Labs and Bellcore) in 1984.
Some of the relevant projects Dr. Duong researched and developed during his time at JPL include:
* Real-Time Mars Landing Site Identification based on real-time color segmentation and adaptation, supported by Self-Evolving Neural Network Architecture namely Cascade Error Projection, to survey and identify a safe and productive landing site in real-time;
* Self-Evolving Neural Network Architecture Supervised Learning algorithm to identify Amino Acid building blocks for Life Detection Mission.
* Space Invariant Independent Component Analysis (SPICA) for recovering the original odorant sources from unknown mixtures for ENose (a multi-element chemical sensor) in an open unknown environment (Caltech patent).
* Introductory Extended Visual Pathway Data Flow, a technology which has now been fully developed at ADC (Caltech patent).
* Cognitive Computing Architecture that enables a general-purpose neural processor chip to be equipped with a compiler, making low power, compactness, and real-time adaptive operation available in a single package. This set a cornerstone for intelligent perception and recognition in hardware implementation (Caltech patent).
* Others.
With his 12 patents with NASA or Caltech Assignee, 5 patents with ADC Assignee, and nine of them are neural networks related technology.
These technologies have provided the foundation for the technologies ADC has now brought to fruition. NASA/JPL-Caltech provided generous support and an excellent environment for doing this preliminary research. Involvement through licensing and other arrangements continues to be a key to ADC’s success.
Our Technology
At Adaptive Computation LLC, Dr. Tuan A Duong invented the Extended Visual Pathway (EViP) approach as an unsupervised learning approach to integrate a saccadic eye movement emulator with a bio-inspired visual processing pathway to enable the detection and recognition of generic full/partial/low resolution/ sketched/degraded objects in open and ambiguous environments. This basic technology is protected by US and international patents.
He also invented a new learning architecture to enable the machine to self-learn new objects autonomously and additively in a sequential manner when the objects arrive and appear at different times. Hence the cognitive and perceptive capability can be equipped for machine intelligence.
Extended Visual Pathway (EViP)
EViP consists of a saccadic eye movement emulator and visual pathway filters and visual cortex.

SOFTWARE
Unsupervised learning (EViP.1)
Bio-inspired Extended Visual Pathway (EViP) software, which integrates a saccadic eye movement emulator with an advanced model of the human visual pathway, to enable real-time processing for the detection and recognition of single or multiple objects in real-time and on-line, given inputs that are:
- partial-view or full-view
- low resolution or “noisy”
- incomplete or “collage” style
- sketches of actual objects.
to search for similar objects in an uncontrolled environments.
EViP along with high floating-point computation (32 bit) has demonstrated with 10,000 distractors, EViP outperforms Human Visual Systems, providing 66% versus 24% correct recognition in rank 1.
With effective bio-inspired features, it enables real-time adaptive capability to meet the dynamic change, to serve as a short-term memory operations.
Face Detection and Recognition in Single Faces Database using OE Sensing Data
Face Detection and Recognition in Single Faces Database using IR Sensing Data
Palm Detection, Recognition and Identification

The evaluation of 100-run for Palm recognition and identification
|
Database 9009 Palms |
Subjects 1120 Persons |
Comments |
|
Confidence |
>95% |
It can be higher if needed. |
|
TP@100 |
54.89 |
It is based on a single palm per person; hence, the improvement can be obtained when more palm photos are added. |
|
FP@100 |
0 |
No risk to be used |
|
Rank 1 |
100% |
Exact match |
|
Rank 2 |
100% |
Similar match |
Self and Dynamic Supervised Learning (EViP.2)
Problems with the current supervised learnings: 1) required all training data ready; 2) During the training phase, it is manned in the loop; 3) it cannot update the new objects, new updated data, based on the previous knowledge unless to restart all over again; 4) it is only ML; hence, it is memorized with some interpolation capability, but no intelligence.
ADC approach enables:
- Dynamic architecture based on the task, hence it is optimal
- Self-learning and sequential learning as data arriving
- New objects and/or new updated data can be accommodated from the previous learning knowledge
- It is facilitated for machine intelligence
These features facilitate the capability of on-line learning to capturing and growing knowledge of previous knowledges or initiating and constructing knowledge of cognitive capabilities; hence, auto intelligence can be extracted. This can be viewed as long-term memory operations.
Dynamic Supervised Learning Algorithm and Architecture (DSLAA)
Dynamic Self-Supervised Learning (DSSL)
Using short-term memory based EViP.1, data of moving vehicle are obtained and use as training to train DSSL. The test results are shown below:
Bio-Inspired Sparse Imager (BISI)
Benefits: reducing color image to sparse gray scale with 61.5x pixel intensity reduction while maintaining the performance in YOLO-x and ResNet-x using BDD100K data set.
Full color video 7-object detection, classification and tracking from BDD100K UCB.
Sparse video 7-object detection, classification and tracking from converting BDD100K UCB.
Sparse video short-term memory based drone tracking
Complete Autonomous and Adaptive Learning System (CAALS)
The closed loop between short-term and long-term memory operation set off the auto intelligence systems.

http://www.youtube.com/watch?v=fQO5xm9Drsk
HARDWARE
Massive Parallel In-Memory Learning and Processing Architecture (MPIMLPA)
Benefits:
- Learning fast, at least 5 orders of magnitude (O (5)) for DNNs as compared with software
- Processing improvement at least O (5)
- Power consumption can be reduced under manageable budgets (e.g. less than a watt, depending on submicron feature size)
Reconfigurable Intelligent Search Engine (RISE)
Reconfigurable Intelligent Search Engine (RISE) is an implementation of EViP via Real-Time Extraction Engine (ReTEE) and architecture.
Benefits: can process 1000 frames/sec (each frame is 1Kx1K) with ROI included.
This is an illustration only.
Low SWaP-C Systems and Technologies
-
Sparse Imaging–Optimal Input Space
* Software Conversion –> Ready
* CMOS imager –> Selectable, but not funded Direct-To-Phase II AF (working to find a home for this technology)
-
Hybrid In-Memory Processing with 8-bit Precision Weight–Effective Processing Architecture
* In-Memory Processing Architectures developed at JPL/NASA since 1992 (Tuan A. Duong, et al. , “Analog 3-D Neuro-processor for Fast Frame Focal Plane Image Processing,” The Industrial Electronics Handbook, Chap. 73, Ed.-In-Chief J. David Irwin, CRC PRESS, 1997.)
* Hybrid Architecture where current mode sparse image serves as fully parallel input to In-memory-processing weight space, to enable high speed and low power processing capabilities
* 8-bit Precision is investigated to remove the processing variations facing in analog approach
-
Dynamic Architecture Software Based On Bio-Inspired Approaches–Mission Specific Approach (not Blanket DNNs)
* Unsupervised learning based on single or a few sample data. It can act as short-term memory to detect, recognize, track and adapt the dynamic moving objects and self-generate training da for long-term memory knowledge
* Dynamic Self-Supervised Learning as long-term memory to grasp training data from short-term memory to self-equipped knowledge
The feedback loop between them enables to accommodate knowledges of object changes in the dynamic environments, dynamic perception and cognition to facilitate the autonomous intelligence architecture
Integrating the three sets of cornerstones for low SWaP-C and autonomous intelligent systems.